DELAY CALCULATION MEETS THE NANOMETER ERA 1OVERVIEWNow that nanometer technology for ICs has become a reality





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False negative situationThis scenario can occur when the delay calculator misses real problems in delay, usually because themodels employed are too simplistic. In particular, when the tool does not address dynamic IR drops,major problems may occur. The chip passes verification but fails in silicon, resulting in re-spins, high costs,and longer time-to-market. False positive situationThis scenario can occur when the delay calculator flags problems that are real but not critical. When themodels cannot discriminate between critical and non-critical delay issues, needless design iterations mayoccur. This ultimately may cause designers to take unnecessary global preventive measures that negativelyimpact cost and performance.In Figure 1, a traditional delay calculator (light bars) and SignalStorm NDC (dark bars) were used for theanalysis of paths. The design contained a 312-MHz block, synthesized clock trees, more than 80 K placeablecomponents, and more than 83 K nets. The analysis came up with 1,430 paths with the traditional methodand 929 paths with SignalStorm NDC, indicating that 35% of the traditional method’s delay-calculatedviolating paths were actually false.Figure 1: The impact of accuracy on timing closure3CAPABILITIES OF A NANOMETER DELAY CALCULATORAn effective delay calculator for the nanometer era requires algorithms, models, and technologiesdeveloped specifically for high-performance nanometer process characteristics. What are the essentialcapabilities needed? Speed, capacity, compatibility with 32-bit machines, accuracy, and IR drop analysiscapability are essential. In summary, a nanometer delay calculator must help reduce the risk of designfailure while giving designers confidence to take maximum advantage of Nanometer processes. Eachessential capability and how SignalStorm NDC meets these needs will be reviewed in detail in this section.3.1SPEED FOR A PRACTICAL SOLUTIONThe industry cannot afford, either in expenditure of time or money, new hardware systems just toimplement a delay calculator. Therefore, this tool must be able to run on today’s 32-bit computers.Tools such as SignalStorm NDC will help maintain speed of operation and conserve valuable resources,because users do not have to purchase new hardware. However, the delay calculator also must becompatible with present and emerging 64-bit machines. In addition to providing operating speed,the analysis time for SignalStorm NDC has been streamlined by maintaining an efficient process. 2Number of violating pathsSlack range (ns)SLACK HISTOGRAM050100150200250 300350400450TraditionalSignalStorm NDC-0.85 to -0.8-0.8 to -0.75-0.7 to -0.65-0.6 to -0.55-0.5 to -0.45-0.4 to -0.35-0.3 to -0.25-0.2 to -0.15-0.1 to -0.05-0.75 to -0.7-0.65 to -0.6-0.55 to -0.5-0.45 to -0.4-0.35 to -0.3-0.25 to -0.2-0.15 to -0.1-0.05 to -0

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    DELAY CALCULATION MEETS THE NANOMETER ERA 1OVERVIEWNow that nanometer technology for ICs has become a reality


    --------------------------------------------------------------------------------
    Page 4
    False negative situationThis scenario can occur when the delay calculator misses real problems in delay, usually because themodels employed are too simplistic. In particular, when the tool does not address dynamic IR drops,major problems may occur. The chip passes verification but fails in silicon, resulting in re-spins, high costs,and longer time-to-market. False positive situationThis scenario can occur when the delay calculator flags problems that are real but not critical. When themodels cannot discriminate between critical and non-critical delay issues, needless design iterations mayoccur. This ultimately may cause designers to take unnecessary global preventive measures that negativelyimpact cost and performance.In Figure 1, a traditional delay calculator (light bars) and SignalStorm NDC (dark bars) were used for theanalysis of paths. The design contained a 312-MHz block, synthesized clock trees, more than 80 K placeablecomponents, and more than 83 K nets. The analysis came up with 1,430 paths with the traditional methodand 929 paths with SignalStorm NDC, indicating that 35% of the traditional method’s delay-calculatedviolating paths were actually false.Figure 1: The impact of accuracy on timing closure3CAPABILITIES OF A NANOMETER DELAY CALCULATORAn effective delay calculator for the nanometer era requires algorithms, models, and technologiesdeveloped specifically for high-performance nanometer process characteristics. What are the essentialcapabilities needed? Speed, capacity, compatibility with 32-bit machines, accuracy, and IR drop analysiscapability are essential. In summary, a nanometer delay calculator must help reduce the risk of designfailure while giving designers confidence to take maximum advantage of Nanometer processes. Eachessential capability and how SignalStorm NDC meets these needs will be reviewed in detail in this section.3.1SPEED FOR A PRACTICAL SOLUTIONThe industry cannot afford, either in expenditure of time or money, new hardware systems just toimplement a delay calculator. Therefore, this tool must be able to run on today’s 32-bit computers.Tools such as SignalStorm NDC will help maintain speed of operation and conserve valuable resources,because users do not have to purchase new hardware. However, the delay calculator also must becompatible with present and emerging 64-bit machines. In addition to providing operating speed,the analysis time for SignalStorm NDC has been streamlined by maintaining an efficient process. 2Number of violating pathsSlack range (ns)SLACK HISTOGRAM050100150200250 300350400450TraditionalSignalStorm NDC-0.85 to -0.8-0.8 to -0.75-0.7 to -0.65-0.6 to -0.55-0.5 to -0.45-0.4 to -0.35-0.3 to -0.25-0.2 to -0.15-0.1 to -0.05-0.75 to -0.7-0.65 to -0.6-0.55 to -0.5-0.45 to -0.4-0.35 to -0.3-0.25 to -0.2-0.15 to -0.1-0.05 to -0